Design and verification of SOC2008 processor based on SPARC V8 architecture for space applications

Author

Liu, Hongjin ; Hua, Gengxin ; Zhang, Shangqing ; Yang, Mengfei ; Wu, Jun

Author_Institution

Beijing Inst. of Control Eng., Beijing, China

fYear

2011

fDate

17-18 Nov. 2011

Firstpage

1

Lastpage

2

Abstract

The space has a radiation environment which introduces Single Event Upset (SEU) and Single Event Transients (SET) to on-Board Computers. As a result, fault tolerance architectures of processor are researched for the development of space-level SOC (System-on-a-Chip). One space-level processor-named SOC2008- is presented in this paper. It is based on SPARC V8 Architecture and uses fault tolerance strategy to settle the radiation problem. SOC2008 is fabricated with 0.13 um CMOS technology, whose area is near to 7.96 × 7.96mm². The frequency is up to 100 MHz. The processor is proven Radiation-Hard through experiment.

Keywords

CMOS digital integrated circuits; fault tolerance; microcomputers; microprocessor chips; system-on-chip; CMOS technology; SET; SEU; SPARC V8 architecture; fault tolerance architecture; on-board computer; radiation-hard through experiment; single event transient; single event upset; size 0.13 mum; space application; space level SOC2008 processor; space-level system on chip processor; Radiation-Hard; SET; SEU; SOC; SPACE;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of

Conference_Location

Tianjin

ISSN

Pending

Print_ISBN

978-1-4577-1998-1

Electronic_ISBN

Pending

Type

conf

DOI

10.1109/EDSSC.2011.6117649

Filename

6117649