A BIST scheme to test static parameters of ADCs

Author

Hongyu, Zhu ; Huiyun Li

Author_Institution

Shenzhen Inst. of Adv. Technol., Chinese Univ. of Hong Kong, Shenzhen, China

fYear

2012

fDate

24-27 June 2012

Firstpage

109

Lastpage

112

Abstract

This paper presents a Built-in Self-Test (BIST) scheme for testing Analog-to-Digital Converters (ADCs) static parameters, including Offset Error, Gain Error, Integral Non-linearity (INL) and Differential Non-linearity (DNL). The main components of the proposed BIST contain a Controller, a Test Pattern Generator (TPG), a Output Response Analyzer (ORA) and a Counter. The ramp signal is used as the stimulus, generated by TPG, Digital-to-Analog Converters (DACs) and filter. The function of filter is to eliminate the effect of DAC transition error to ramp stimulus signal. The correct synchronization between the ramp stimulus and the counter output codes is achieved, and then used by ORA to detect INL and DNL. The experimental results obtained by LabVIEW simulating indicate that thi.

Keywords

analogue-digital conversion; automatic testing; controllers; synchronisation; virtual instrumentation; ADC test static parameter; BIST scheme; DAC transition error; LabVIEW; analog-digital converter static parameter; built-in self-test scheme; controller; counter; counter output code; differential nonlinearity; filter; gain error; integral nonlinearity; offset error; output response analyzer; ramp stimulus signal; synchronization; test pattern generator; Radiation detectors; ADC; BIST; DNL; INL; Ramp;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical & Electronics Engineering (EEESYM), 2012 IEEE Symposium on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4673-2363-5

Type

conf

DOI

10.1109/EEESym.2012.6258600

Filename

6258600