DocumentCode :
2850515
Title :
Restricted symbolic evaluation is fast and useful
Author :
Carter, J.L. ; Rosen, B.K. ; Smith, G.L. ; Pitchumani, V.
Author_Institution :
IBM Res. Div., Yorktown Heights, NY, USA
fYear :
1989
fDate :
5-9 Nov. 1989
Firstpage :
38
Lastpage :
41
Abstract :
A method is presented for simulation with two zillion and three values. The values that are propagated by the simulation include the familiar 0, 1, and X and also a collection of named unknowns and their formal negations. Each value fits into a single computer word. Applications of this restricted symbolic evaluation include design rule checking for circuits with embedded arrays and timing verification. The authors explore these two applications briefly. By carefully choosing rules for combining the two zillion and three values, and the representations of the values, it is possible to make simulation surprisingly efficient. The authors present two variants and an implementation of each. Both are fast; the faster one sometimes yields less information.<>
Keywords :
logic CAD; circuits; computer word; design rule checking; embedded arrays; formal negations; named unknowns; restricted symbolic evaluation; rules; simulation; timing verification; Application software; Circuit simulation; Clocks; Computational modeling; Computer simulation; Data systems; Discrete event simulation; Latches; Logic design; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
Type :
conf
DOI :
10.1109/ICCAD.1989.76900
Filename :
76900
Link To Document :
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