The influence of the input capacitor on the ESD behavior

Author

Wei, Shouming ; Qian, Qinsong ; Sun, Weifeng ; Zhu, Jing ; Liu, Siyang

Author_Institution

Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China

fYear

2011

fDate

17-18 Nov. 2011

Firstpage

1

Lastpage

2

Abstract

The Electrostatic discharge (ESD) capabilities of the gate-ground NMOS devices in the circuits with and without input capacitance are experimentally compared in this paper. The experimental results show that the input capacitor can reduce the ESD robustness, which has been explained in detail by using two-dimensional simulator. At last, a novel design is also proposed to improve the ESD protection behavior of the CMOS integrated circuits with the input capacitor. The proposed design is validated by using two-dimensional simulations and experimental analysis.

Keywords

CMOS integrated circuits; capacitance; capacitors; circuit simulation; electrostatic discharge; CMOS integrated circuit; ESD behavior; ESD capability; ESD protection behavior; ESD robustness; capacitance; electrostatic discharge; gate-ground NMOS device; input capacitor; two-dimensional simulator; Capacitors; Electrostatic discharges; Logic gates; Robustness; Stress; Substrates; Transistors; Electro-static discharge; improved structure; input capacitor;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of

Conference_Location

Tianjin

ISSN

Pending

Print_ISBN

978-1-4577-1998-1

Electronic_ISBN

Pending

Type

conf

DOI

10.1109/EDSSC.2011.6117689

Filename

6117689