DocumentCode
285106
Title
A computing system of (modular) chips
Author
Wang, Yiwen ; Salam, F.M.A.
Author_Institution
Dept. of Comput. Eng., Minnesota Univ., Duluth, MN, USA
Volume
2
fYear
1992
fDate
7-11 Jun 1992
Firstpage
660
Abstract
Various analog chips with digital on-chip learning capability are described. A system of four neural chips has been constructed. The chips and the system have passed the testing stage and have been utilized in various experiments in image processing, recognition, and association. A prototype system consisting of four chips has 289 neurons and can process sub-images of 17×17 resolution in less than 400 ns. Second generation designs of ANNs using the dendro-dendritic ANN (DANN) architecture and the usual feedback (Hopfield-type) architecture are discussed, and transient behavior measurement that confirms that the worst convergence time to the desired steady state in less than 400 ns are presented
Keywords
analogue computer circuits; neural chips; ANNs; Hopfield-type; dendro-dendritic ANN; neural chips; on-chip learning; transient behavior; Image processing; Image recognition; Neural network hardware; Neurofeedback; Neurons; Prototypes; Semiconductor device measurement; State feedback; System testing; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location
Baltimore, MD
Print_ISBN
0-7803-0559-0
Type
conf
DOI
10.1109/IJCNN.1992.226912
Filename
226912
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