DocumentCode :
285110
Title :
Neural processor implementation using MSPSE devices
Author :
Schacter, B.J. ; Brewer, Joe E.
Author_Institution :
Westinghouse Electric Corp., Baltimore, MD, USA
Volume :
2
fYear :
1992
fDate :
7-11 Jun 1992
Firstpage :
620
Abstract :
Advantages exist for implementation of neural networks using emerging monolithic processor devices that incorporate communication resources and large amounts of memory. The MSPSE (monolithic synchronous processor slave element) device currently under development is representative of a broad class of emerging devices with both computation and communication capability. The MSPSE´s high computing throughput, large internal memory, and ability to operate multiple instruction multiple data (MIMD) or single instruction/multiple data (SIMD) mode make it suitable for implementation of neural networks
Keywords :
multiprocessing systems; neural nets; MIMD; SIMD; monolithic processor devices; monolithic synchronous processor slave element; multiple instruction multiple data; neural networks; CMOS technology; Clocks; Data buses; Digital signal processing; Instruments; Laboratories; Neural networks; Random access memory; Software performance; Subcontracting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
Type :
conf
DOI :
10.1109/IJCNN.1992.226919
Filename :
226919
Link To Document :
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