DocumentCode
2851318
Title
Balanced Dimension-Order Routing for k-ary n-cubes
Author
Montañana, Jose Miguel ; Koibuchi, Michihiro ; Matsutani, Hiroki ; Amano, Hideharu
Author_Institution
Nat. Inst. of Inf., Tokyo, Japan
fYear
2009
fDate
22-25 Sept. 2009
Firstpage
499
Lastpage
506
Abstract
Current Network-on-Chip (NoC) architectures sometimes employ mesh or torus topology with the dimension-order routing. In this paper, we propose a deadlock-free routing algorithm, referred to as Balanced Dimension-Order Routing (BDOR), which provides the balanced minimal paths to each destination based on the simple routing regulations. Since the BDOR has the similar path regularity to that of the dimension-order routing, its implementation can be lightweight, and most of its modules can be borrowed from the router for the dimension-order routing. Evaluation results show that the BDOR router increases by 3.4% hardware amount compared with the router for the dimension-order routing. Also show that the throughput of the BDOR outperforms on average up to 14% that of the dimension-order routing on two-dimensional mesh and torus.
Keywords
concurrency control; hypercube networks; network routing; network topology; network-on-chip; parallel machines; balanced dimension-order routing; deadlock-free routing algorithm; k-ary n-cubes; mesh topology; network-on-chip architecture; path regularity; routing regulation; torus topology; Computer science; Informatics; Logic; Mesh networks; Network topology; Network-on-a-chip; Parallel processing; Registers; Routing; System recovery; Network-on-Chip; Routing algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing Workshops, 2009. ICPPW '09. International Conference on
Conference_Location
Vienna
ISSN
1530-2016
Print_ISBN
978-1-4244-4923-1
Electronic_ISBN
1530-2016
Type
conf
DOI
10.1109/ICPPW.2009.64
Filename
5365405
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