Exploiting RAM for fault-tolerant functions in FPGA

When realizing a reliable digital system, special attention has to be paid if the target device is an FPGA. In this case, classical fault tolerance techniques are usually not suited to protect the design. This is due to the actual resources used to implement the design, that involves sequential elements even for the combinatorial function and routing. In this paper a method to protect generic functions in FPGA is presented, taking advantage of embedded synchronous memories available on modern FPGAs. As a case study, the implementation of some common functions is proposed along with some optimizations to reduce the use of resources.