• DocumentCode
    2852048
  • Title

    Reconfigurable Threshold Logic Gates using memristive devices

  • Author

    Thanh Tran ; Rothenbuhler, Adrian ; Smith, E.H.B. ; Saxena, Vishal ; Campbell, Kristy A.

  • Author_Institution
    Electr. & Comput. Eng. Dept., Boise State Univ., Boise, ID, USA
  • fYear
    2012
  • fDate
    9-10 Oct. 2012
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide memristive devices combined with CMOS circuits. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in a Matlab-Simulink/Cadence co-simulation using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices.
  • Keywords
    CMOS integrated circuits; NAND circuits; NOR circuits; logic design; logic gates; memristors; silver compounds; threshold logic; CMOS circuit; NAND; NOR; TLG; linearly separable logic function; reconfigurable threshold logic gates; silver-chalcogenide memristive device; CMOS integrated circuits; Integrated circuit modeling; Logic gates; Memristors; Programming; Resistance; Threshold voltage; memristors; threshold logic circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Subthreshold Microelectronics Conference (SubVT), 2012 IEEE
  • Conference_Location
    Waltham, MA
  • Print_ISBN
    978-1-4673-1586-9
  • Type

    conf

  • DOI
    10.1109/SubVT.2012.6404301
  • Filename
    6404301
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2852048