DocumentCode :
2852103
Title :
Statistical eye analysis implemented in VHDL-AMS
Author :
Muranyi, Arpad
Author_Institution :
Mentor Graphics Corp., Redmond
fYear :
2007
fDate :
20-21 Sept. 2007
Firstpage :
64
Lastpage :
66
Abstract :
This paper introduces the reader to a VHDL-AMS (an IEEE-endorsed standard modeling language, standard 1076.1) implementation of the basic Statistical Eye Analysis algorithm. The main purpose of this paper is to show how such algorithms can be implemented using VHDL-AMS, and not to discuss the derivation details, novelty or usefulness of the algorithms. The example code that accompanies this paper is fully functional, but many more features and refinements need to be added to it to make it ready for real-world design work. The topic of this paper is essentially a continuation of the presentation given by the author on "Peak Distortion Analysis Implemented in VHDL-AMS".
Keywords :
hardware description languages; mathematics computing; statistical analysis; IEEE-endorsed standard modeling language; VHDL-AMS; standard 1076.1; statistical eye analysis; Algorithm design and analysis; Bit error rate; Circuit simulation; Circuit testing; Computer languages; Distributed parameter circuits; Inductors; Mathematical model; Pulse generation; Resistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Behavioral Modeling and Simulation Workshop, 2007. BMAS 2007. IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-1567-0
Type :
conf
DOI :
10.1109/BMAS.2007.4437526
Filename :
4437526
Link To Document :
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