Behavioral modeling of a charge pump voltage converter for SoC functional verification purposes

To enable full chip functional verification, critical system building blocks need to be abstracted and simplified using behavioral models. Charge pump voltage converters are highly active circuits and act as bottle necks when integrated in SoC verification simulations. In this paper, a charge pump circuit designed by STMicroelectronics will be modeled using VHDL-AMS. Using this model, the whole SoC can be simulated by ADVance MStrade.