DocumentCode
2853002
Title
Dual Z-source Inverter with Three-Level Reduced Common Mode Switching
Author
Gao, F. ; Loh, P.C. ; Blaabjerg, Frede ; Vilathgamuwa, D.M.
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume
2
fYear
2006
fDate
8-12 Oct. 2006
Firstpage
619
Lastpage
626
Abstract
This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye- or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulation-wise, the dual inverter can be controlled using a carefully designed carrier-based pulse-width modulation (PWM) scheme that always will ensure balanced voltage boosting of the Z-source network, while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings together with the inverter practicality have been confirmed both in simulations using PSIM with Matlab/Simulink coupler and experimentally using a laboratory implemented inverter prototype
Keywords
PWM invertors; PWM power convertors; mathematics computing; network analysis; Matlab/Simulink coupler; PSIM; buck-boost power conversion; delta-connected loads; dual Z-source inverter; dual inverter PWM scheme; dual inverter control; pulse-width modulation scheme; reduced common mode switching; semiconductor failure; semiconductor switches; single dc source; three-level common mode switching; three-level inverters; two isolated dc sources; voltage boosting; wye-connected loads; Boosting; Delay; Laboratories; Power conversion; Power generation; Power semiconductor switches; Pulse inverters; Pulse transformers; Pulse width modulation inverters; Voltage control; Z-source inverters; buck-boost; dual inverters; reduced common mode switching; three-level inverters;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 2006. 41st IAS Annual Meeting. Conference Record of the 2006 IEEE
Conference_Location
Tampa, FL
ISSN
0197-2618
Print_ISBN
1-4244-0364-2
Electronic_ISBN
0197-2618
Type
conf
DOI
10.1109/IAS.2006.256591
Filename
4025277
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