Title :
One-neuron circuitry for carry generation in a 4-bit adder
Author :
Yao, Chia-Yu ; Willson, Alan N., Jr.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
It is shown how a parallel carry generator circuit using the sigmoidal (input/output) characteristic of a neuron can be employed in a carry select adder architecture. The circuit performs the carry generation function in parallel with the generation of the summation bits. By examining the input-output pairs of a digital adder it is found that the generation of its output carry is a most basic mapping of a neural network, the mapping of a single neuron. The realization of this mapping by a transistor circuit is described. Performance results derived from SPICE simulations of the proposed circuit, using 1.2-μm CMOS technology, are also given
Keywords :
CMOS integrated circuits; SPICE; adders; carry logic; neural chips; 1.2 micron; 1.2-μm CMOS technology; 4 bit; SPICE simulations; carry select adder architecture; input/output characteristic; one-neuron circuitry; parallel carry generator circuit; sigmoidal characteristic; summation bits; transistor circuit; Adders; Arthritis; CMOS digital integrated circuits; CMOS technology; Circuit simulation; Equations; Neural networks; Neurons; SPICE; Voltage;
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
DOI :
10.1109/IJCNN.1992.227173