DocumentCode :
2853195
Title :
The inverting cell concept for MOS dynamic RAMS
Author :
Martino, W. ; Croxon, B.
Author_Institution :
Honywell Information Systems Inc., Billerica, Mass., USA
Volume :
XV
fYear :
1972
fDate :
16-18 Feb. 1972
Firstpage :
12
Lastpage :
13
Abstract :
Power consumption can be reduced and refreshing simplified using a unique memory array with one extra run of cells, A 2048-bit chip has access time of 360 ns at less than 150 mW dissipation.
Keywords :
Arithmetic; Blanking; Circuits; Clocks; Electronics packaging; Equations; Pattern analysis; Power dissipation; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1972.1155045
Filename :
1155045
Link To Document :
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