SOI for MEMS and advanced packaging

Author

Muldavin, Jeremy ; Bozler, C. ; Yost, D. ; Chen, Ci ; Wyatt, P.

Author_Institution

MIT Lincoln Lab., Lexington, MA, USA

fYear

2012

fDate

1-4 Oct. 2012

Firstpage

1

Lastpage

2

Abstract

Silicon on Insulator (SOI) Technologies offer many advantages for the fabrication and advanced packaging of MEMS and IC devices and systems. The buried oxide provides an excellent etch stop and the silicon layers on top can be selected for the exact thickness, crystal orientation, and purity for the required application. These properties are exploited for the fabrication and packaging of MEMS devices as well as for 3D integration of SOI CMOS and flexible electronics. Particular examples from work done at MIT Lincoln Laboratory over the last 10 years will be included.

Keywords

crystal orientation; etching; flexible electronics; integrated circuit packaging; microfabrication; silicon-on-insulator; three-dimensional integrated circuits; 3D integration; IC devices; MEMS advanced packaging; MEMS devices; MEMS fabrication; MIT Lincoln laboratory; SOI CMOS; SOI technology; Si; buried oxide; crystal orientation; etch stop; flexible electronics; silicon layers; silicon-on-insulator technology; CMOS integrated circuits; Laboratories; Micromechanical devices; Packaging; Silicon; Silicon on insulator technology; Substrates; 3DIC; RF MEMS; flexible electronics; packaging;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference (SOI), 2012 IEEE International

Conference_Location

NAPA, CA

ISSN

1078-621X

Print_ISBN

978-1-4673-2690-2

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2012.6404402

Filename

6404402