DocumentCode
285331
Title
Incorporating formal techniques into systolic array synthesis
Author
Ling, Nam
Author_Institution
Dept. of Comput. Eng., Santa Clara Univ., CA, USA
Volume
1
fYear
1992
fDate
10-13 May 1992
Firstpage
451
Abstract
The concept of using induction for designing arrays is illustrated by four different inductive design techniques: regular, stronger, double, and reverse order. These techniques exploit the repeatability, regularity, and locality of the appropriate algorithm and the corresponding array structure to provide an efficient way of deriving systolic designs. Such formal techniques also guarantee the correctness of designs. Two examples are given to illustrate how the techniques can be applied and be used to improve the design
Keywords
VLSI; formal verification; systolic arrays; array structure; correctness; double inductive design; formal techniques; induction; locality; regular inductive design; regularity; repeatability; reverse order; stronger inductive design; systolic array synthesis; Algorithm design and analysis; Data analysis; Design methodology; Process design; Processor scheduling; Scheduling algorithm; Systolic arrays; Telephony; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.229916
Filename
229916
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