DocumentCode
2853420
Title
IEEE P1581 can solve your board level memory cluster test problems
Author
Ehrenberg, Heiko
Author_Institution
GOEPEL Electron., Austin, TX
fYear
2007
fDate
21-26 Oct. 2007
Firstpage
1
Lastpage
9
Abstract
This paper highlights various challenges test engineers face when they attempt to test pin connectivity on memory devices at board and system level. IEEE P1581 was presented as an elegant solution to these challenges. Furthermore, this paper provide an update on the latest developments in the IEEE PI581 specification.
Keywords
integrated circuit testing; integrated memory circuits; IEEE PI581 specification; board level memory cluster test problems; pin connectivity testing; system level; Circuit testing; Design for testability; EPROM; Electronic equipment testing; Life testing; Manufacturing; Pins; Random access memory; Read-write memory; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-1127-6
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2007.4437625
Filename
4437625
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