DocumentCode :
2853690
Title :
400-picosecond logic LSI
Author :
Taniguchi, Kazuhiro ; Hayasaka, A. ; Kaji, T. ; Uehara, Kazuhiro ; Nitta, Tom ; Suzuki, M.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Volume :
XV
fYear :
1972
fDate :
16-18 Feb. 1972
Firstpage :
88
Lastpage :
89
Abstract :
This paper will discuss 29-gate ECL integrated circuits with a 400-ps loaded delay, Proposed current sources for ECL´s and a transistor base reduced by unique self-aligning technique contribute to the low-power, high-speed LSI.
Keywords :
Breakdown voltage; Current supplies; Digital video broadcasting; Etching; Feedback circuits; Impedance; Large scale integration; Logic; Low voltage; Resistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1972.1155076
Filename :
1155076
Link To Document :
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