Title :
Enhanced testing of clock faults
Author :
McLaurin, Teresa L. ; Slobodnik, Richard ; Tsai, Kun-Han ; Keim, Ana
Author_Institution :
ARM Inc, Austin, TX
Abstract :
A test methodology for the control signals including clock logic, ripple reset and register file read/write control of the Cortex-A8trade high performance microprocessor core is presented. The target fault models include the stuck-at fault, transition fault and hold time fault models.
Keywords :
clocks; digital integrated circuits; fault diagnosis; logic testing; microprocessor chips; Cortex-A8; clock faults testing; clock logic; hold time fault models; microprocessor core; register file read/write control; ripple reset; stuck-at fault; target fault models; transition fault; Automatic test pattern generation; Circuit faults; Circuit testing; Clocks; Costs; Delay; Logic design; Logic testing; Microprocessors; Timing;
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-1127-6
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2007.4437651
