Title :
A bounded delay race model
Author_Institution :
Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
In order to detect potential timing problems caused by small deviations of the internal delays in a VLSI circuit, a delay model is proposed in which the sizes of the delays are bounded by lower and upper bounds. He then introduces a race model, called the extended bounded delay (XBD) model, is presented, which can be used to predict the behavior of a circuit when the circuit is started in a stable state and some inputs change. The XBD race model is continuous and computationally intractable. A description is also given of an efficient algorithm, called the ternary bounded delay (TBD) algorithm, and it is shown that the results of this algorithm exactly summarize the behavior of the network according to the XBD race model. The author has implemented the TBD algorithm in the COSMOS switch-level simulator, and early results show that the overhead is small compared with standard unit delay simulation.<>
Keywords :
VLSI; automatic testing; delays; digital integrated circuits; digital simulation; electronic engineering computing; fault location; logic testing; COSMOS switch-level simulator; VLSI circuit; bounded delay race model; internal delays; prediction; standard unit delay simulation; ternary bounded delay algorithm; timing problems; Circuit simulation; Computational modeling; Computer science; Delay; Input variables; Predictive models; Timing; Upper bound; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.76920
