DocumentCode
285390
Title
SPHINX: a high level synthesis system for DSP design
Author
Bayoumi, Magdy A. ; Ramakrishna, N.A. ; Madraswala, Taher ; Sahu, Sambit
Author_Institution
Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
Volume
1
fYear
1992
fDate
10-13 May 1992
Firstpage
172
Abstract
A brief overview is given of the Sphinx System, a high-level synthesis system consisting of an integrated and interacting set of tools for the synthesis of digital circuits. The system is tuned to the synthesis of DSP ASICs from behavior specifications written in Verilog. Sphinx consists of tools for behavioral, structural, and logical synthesis, technology mapping, and simulation. C and SKILL have been used as the implementation and extension language and the system will be integrated into the Cadence Edge Framework. The pipelined scheduling and allocation subsystem of Sphinx are examined in more detail
Keywords
application specific integrated circuits; circuit layout CAD; digital signal processing chips; ASICs; C language; Cadence Edge Framework; DSP design; SKILL language; SPHINX; Sphinx; Verilog; allocation subsystem; extension language; high level synthesis system; interacting set of tools; logical synthesis; overview; pipelined scheduling; simulation; technology mapping; Computer architecture; Control system synthesis; Databases; Digital circuits; Digital signal processing; Hardware design languages; High level synthesis; Integrated circuit synthesis; Prototypes; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.229986
Filename
229986
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