DocumentCode
285396
Title
Algorithm-based fault tolerance for FFT networks
Author
Wang, Sying-Jyan ; Jha, Niraj K.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Volume
1
fYear
1992
fDate
10-13 May 1992
Firstpage
141
Abstract
Algorithm-based fault tolerance (ABFT), a low-overhead technique for incorporating fault tolerance into multiprocessor architectures, is treated. An approach that maintains the high throughput of previous schemes, yet needs lower hardware overhead and achieves higher fault coverage, is proposed. Results for the different schemes are shown
Keywords
fast Fourier transforms; fault tolerant computing; multiprocessor interconnection networks; FFT networks; fault coverage; hardware overhead; high throughput; low-overhead technique; multiprocessor architectures; Digital signal processing; Discrete Fourier transforms; Error correction; Fast Fourier transforms; Fault tolerance; Hardware; Real time systems; Redundancy; Signal processing algorithms; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.229994
Filename
229994
Link To Document