Title :
Modeling for computation of IC-gate yield from processing data
Author :
Wilson, C. ; Dowell, R.
Author_Institution :
Bell Telephone Labs., Inc., Murray Hill, N.J., USA
Abstract :
Modeling techniques allowing computation of IC-gate electrical yield from processing distributions and circuit configuration will be presented. An example will include an analysis of a Collection-Diffused-Isolated IC gate.
Keywords :
Circuit analysis; Circuit analysis computing; Computational modeling; Conductivity; Doping; Gain measurement; Impurities; Semiconductor process modeling; Solid state circuits; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1972.1155094
