How much insurance can you afford?

Most chips designed have debug logic. Debug techniques including visibility of a debug bus, controls for complicated circuitry like RAM self timing or high speed I/O, and clock control have been used for many years by many companies. Many older techniques like scan enabled debug and on-chip logic analyzers and emerging techniques like specialized on-chip instrumentation look interesting but are not used in most designs today. The big question is why don´t some of these techniques catch on more and how much debug logic is needed to mitigate the risk of slow time to market?