Title :
Design-for-debug to address next-generation soc debug concerns
Author_Institution :
NXP Semicond. / Corp. Innovation & Technol. / Res., Eindhoven
Abstract :
In summary, DfD has helped to reduce time-to-market in many use cases across the industry. However in general, the need to actual add dedicated debug features to an SoC design is only slowly being realized and accepted. The complexity of next-generation SoCs requires both a holistic approach to system debug, integrating hardware and software debug infrastructures, and extensions beyond current debug capabilities. Semiconductor manufacturers, tool vendors, and academia will have to co-operate to find solutions to the debug challenges of these SoCs.
Keywords :
integrated circuit design; logic design; program debugging; system-on-chip; SoC design; design-for-debug; hardware debug infrastructure; next-generation SoC debug; software debug infrastructure; time-to-market reduction;
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-1127-6
DOI :
10.1109/TEST.2007.4437683