DocumentCode :
2854268
Title :
Design-for-debug to address next-generation soc debug concerns
Author :
Vermeulen, B.
Author_Institution :
NXP Semicond. / Corp. Innovation & Technol. / Res., Eindhoven
fYear :
2007
fDate :
21-26 Oct. 2007
Firstpage :
1
Lastpage :
1
Abstract :
In summary, DfD has helped to reduce time-to-market in many use cases across the industry. However in general, the need to actual add dedicated debug features to an SoC design is only slowly being realized and accepted. The complexity of next-generation SoCs requires both a holistic approach to system debug, integrating hardware and software debug infrastructures, and extensions beyond current debug capabilities. Semiconductor manufacturers, tool vendors, and academia will have to co-operate to find solutions to the debug challenges of these SoCs.
Keywords :
integrated circuit design; logic design; program debugging; system-on-chip; SoC design; design-for-debug; hardware debug infrastructure; next-generation SoC debug; software debug infrastructure; time-to-market reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2007. ITC 2007. IEEE International
Conference_Location :
Santa Clara, CA
ISSN :
1089-3539
Print_ISBN :
978-1-4244-1127-6
Type :
conf
DOI :
10.1109/TEST.2007.4437683
Filename :
4437683
Link To Document :
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