DocumentCode :
2854429
Title :
Wirebonding: reinventing the process for MCMs
Author :
Charles, H.K., Jr. ; Mach, K.J. ; Edwards, R.L. ; Lehtonen, S.J. ; Lee, D.M.
Author_Institution :
Appl. Phys. Lab., Johns Hopkins Univ., Laurel, MD, USA
fYear :
1998
fDate :
15-17 Apr 1998
Firstpage :
300
Lastpage :
302
Abstract :
Summary form only given. Wirebonding is the mainstay interconnect for current IC products. Due to the standardization of pad metallurgy, wire types, package structures and bond optimization methods, wirebonding of individually packaged parts has achieved significant levels of quality and reliability. The situation in the multichip module (MCM) world is quite different. The introduction of the interconnection substrate with its typically different metallurgy, variable trace and pad geometries, multiple fabrication and attach process, and now in many cases a flexible or compliant (soft) structure has caused significant increases in wirebond failure rates and bondability concerns. We have conducted a systematic study of wirebonding processes (both thermosonic and ultrasonic) for multichip applications. The study included a variety of rigid, semi-rigid and compliant type substrate structures, both Si and GaAs chips, and even some exotic detector chips (CZT) and array structures. In this paper, we describe further results in bonding to soft or compliant substrate structures. Parameters investigated include bonding pad structures and morphology, the effect of ultrasonic delay on allowing compliant materials to recover after application of bonding force, and the influence of changing (increasing) the ultrasonic frequency from the standard 601 Hz. Again, the wirebond pull test and the ball bond shear test are used as measures for improvement. Strength maintenance as a function of aging at elevated temperature is used as an indicator of reliability
Keywords :
delays; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; lead bonding; mechanical strength; mechanical testing; multichip modules; optimisation; quality control; 601 Hz; GaAs; GaAs chips; MCM wire bonding process; Si; Si chips; aging; array structures; ball bond shear test; bond optimization; bondability; bonding force; bonding pad morphology; bonding pad structure; bonding pad structures; compliant materials recovery; compliant structure; compliant substrate structure; detector chips; die attach process; fabrication process; flexible soft structure; interconnection substrate; metallurgy; multichip applications; multichip module; package structure; pad geometry; pad metallurgy; quality; reliability; rigid substrate structure; semi-rigid substrate structure; standardization; strength maintenance; thermosonic bonding; trace geometry; ultrasonic bonding; ultrasonic delay; ultrasonic frequency; wire type; wirebond failure rate; wirebond interconnect; wirebond pull test; wirebonding; Bonding forces; Fabrication; Gallium arsenide; Geometry; Materials testing; Multichip modules; Optimization methods; Packaging; Standardization; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-4850-8
Type :
conf
DOI :
10.1109/ICMCM.1998.670797
Filename :
670797
Link To Document :
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