Pulse distortion analysis techniques

To guarantee high-speed performance, the highest reliable operating frequency of a logic function must be determined. The pulsewidth distortion (PWD) characteristics of logic circuits determine this frequency. Sound system design practice requires that this frequency be accurately determined during the logic design. Pulsewidth distortion in several sample logic nets was studied with a circuit simulator, a logic chain pulse statistical analysis program, and hardware. The authors evaluate the PWD simulation of several representative logic nets on a VLSI chip and correlate the results to hardware data. The relationships between parameters are used to construct circuit simulations of PWD in ASTAP (the IBM circuit performance simulator) and to develop PWD tables for the pulse statistical analysis program. The results obtained show that PWD is accurately predicted with either ASTAP or the pulse statistical analysis program tool