Title :
Optimal wafer probe testing and diagnosis of k-out-of-n structures
Author :
Chang, M.-F. ; Shi, W. ; Fuchs, W.K.
Author_Institution :
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Abstract :
The authors investigate wafer probing strategies for the diagnosis of repairable VLSI and WSI (wafer scale integration) structures based on integrated diagnosis and repair. Knowledge of the repair strategy, the probability of each unit being good, and the expected test time each unit are used by the diagnosis algorithm to select units for wafer probe testing. The general problem is described followed by an examination of a specific case. Wafer probe diagnosis of k-out-of-n systems is analyzed and optimal diagnosis algorithms are derived. A compact representation of the optimal diagnosis scheme which needs O(n/sup 2/) space and can be generated in O(n/sup 2/) time is described.<>
Keywords :
VLSI; integrated circuit testing; WSI; diagnosis; integrated diagnosis and repair; k-out-of-n structures; optimal wafer probe testing; repairable VLSI; wafer scale integration; Algorithm design and analysis; Circuit faults; Contracts; Cost function; Fault diagnosis; Manufacturing processes; Probes; System testing; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.76944