Title :
Optimal layout via Boolean satisfiability
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Abstract :
The author transforms various NP-complete problems in layout, namely, two- and multilayer dogleg channel routing, two-way partitioning, one-dimensional and two-dimensional placement, into Boolean satisfiability problems. The transformations are efficient in that the number of inputs to the Boolean function, for which he has to find a satisfying assignment, only grows linearly or quasilinearly with the layout problem size. These transformations also produce a minimal-size Boolean function in order to speed up satisfiability check performance.<>
Keywords :
Boolean functions; circuit layout CAD; Boolean satisfiability; NP-complete problems; multilayer dogleg channel routing; one-dimensional placement; optimal layout; two-dimensional placement; two-way partitioning; Boolean functions; Costs; Fires; Large-scale systems; Paper technology; Programmable logic arrays;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.76956
