DocumentCode
2855356
Title
Pin assignment with global routing
Author
Cong, J.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1989
fDate
5-9 Nov. 1989
Firstpage
302
Lastpage
305
Abstract
An algorithm is presented which combines the pin assignment step and the global routing step in the physical design of VLSI circuits. The algorithm is based on two key theorems: the channel pin arrangement theorem and the finite interval decomposition theorem. These two theorems enable the author to deal successfully with the high complexity resulting from combining the pin assignment and global routing steps. According to these two theorems, the author need only generate a coarse pin assignment and global routing topology. The exact pin locations and global solution can later be determined optimally and by a linear time algorithm. The author implemented a pin assignment and global routing package named BeauticianGR based on the proposed algorithm.<>
Keywords
VLSI; circuit layout CAD; BeauticianGR; VLSI circuits; algorithm; finite interval decomposition theorem; global routing; global routing step; physical design; pin assignment step; Algorithm design and analysis; Circuits; Computer science; Logic functions; Packaging; Partitioning algorithms; Process design; Routing; Topology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-1986-4
Type
conf
DOI
10.1109/ICCAD.1989.76958
Filename
76958
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