Title :
Modular analog continuous-time VLSI neural networks with on-chip Hebbian learning and analog storage
Author :
Linares-Barranco, B. ; Sánchez-Sinencio, E. ; Rodriguez-Vazquez, A. ; Huertas, J.L.
Author_Institution :
Centro Nacional de Microelectron., Sevilla, Spain
Abstract :
A modular analog circuit design approach for hardware implementations of neural networks is presented. This approach is based on the use of small transconductance multipliers as the main component, and is therefore called the T-mode (transconductance-mode) approach. This circuit design technique was used to design a set of modular chips which assembled to build either BAM (bidirectional associative memory) networks, Hopfield networks, winner-take-all networks, or simplified ART1 networks. The approach is extended afterwards in order to include a Hebbian learning rule into each synapse. As an example, a learning BAM network system is shown. The experimental results given were obtained from 2-μm CMOS double-metal double-polysilicon (MOSIS) prototypes
Keywords :
CMOS integrated circuits; Hebbian learning; Hopfield neural nets; VLSI; analogue processing circuits; content-addressable storage; neural chips; BAM; CMOS double-metal double-polysilicon technology; Hopfield networks; T-mode approach; analog continuous-time VLSI neural networks; analog storage; bidirectional associative memory; modular chips; on-chip Hebbian learning; simplified ART1 networks; synapse; transconductance multipliers; winner-take-all networks; Analog circuits; Assembly; Associative memory; Circuit synthesis; Magnesium compounds; Network-on-a-chip; Neural network hardware; Neural networks; Transconductance; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0593-0
DOI :
10.1109/ISCAS.1992.230207
