Reduction of conducted EMI for SiC JFET inverters by separating heat sinks

This paper proposes to use separate heat sinks to reduce the conducted electromagnetic interference (EMI) for a Silicon Carbide (SiC) JFET inverter for motor drives. The inverter circuit layout is implemented with discrete SiC JFETs attached on top of the heat sink, which creates extensive capacitive couplings and moreover increases the parasitic oscillations. To minimize the influence, the solution of using separate heat sinks is proposed. For better CM performance, the high side heat sink is grounded to avoid the fast dv/dts that occur between the drain of the lower switch and the low side heat sink. For better DM performance, the RC snubber circuit and ferrite beads are used to dampen the parasitic oscillations. Two 2.2 kW inverters prototypes - with six discrete SiC JFETs on one common heat sink and separate heat sinks respectively are built using the same circuit layout. Their EMC performance is compared under unfiltered and filtered conditions. The experiments show that the separate heat sinks inverter system exhibits a significantly reduced EMI, however still can not satisfy the imposed standard. Finally, three improved methods are proposed, which effectively suppresses the emitted EMI to comply with the standard of IEC61800-3-C2: Qp.