DocumentCode
2856368
Title
Design considerations for merged transistor logic (Integrated injection logic circuits)
Author
Berger, H.
Author_Institution
IBM Laboratories, Boeblingen, Germany
Volume
XVII
fYear
1974
fDate
15-13 Feb. 1974
Firstpage
14
Lastpage
15
Abstract
Experiments clarifying the features of the MTL structure contributing to current gain and circuit delay will be described and conclusions for the design of optimum structures offered.
Keywords
Circuit optimization; Current measurement; Diodes; Electron devices; Laboratories; Logic circuits; Logic design; Logic devices; Merging; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1974 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1974.1155246
Filename
1155246
Link To Document