DocumentCode :
2856498
Title :
The Design of SVPWM IP Core Based on FPGA
Author :
Yang, Guijie ; Zhao, Pinzhi ; Zhou, Zhaoyong
Author_Institution :
Sch. of Electr. Eng. & Autom., Harbin Inst. of Technol., Harbin
fYear :
2008
fDate :
29-31 July 2008
Firstpage :
191
Lastpage :
196
Abstract :
This paper expounds the basic principle of SVPWM from the perspective of vector analysis, and derives the necessary mathematical formula to implement this digital design. Also, this paper presents a basic structure of the digital hardware circuit based on FPGA. The proposed scheme is implemented and verified on a single Altera FPGA. The experimental results are presented in the end and show that the approach of digital SVPWM based on FPGA is feasible and can all achieve expected performances.
Keywords :
field programmable gate arrays; mathematical analysis; pulse width modulation; Altera FPGA; IP core; digital design; digital hardware circuit; mathematical formula; space vector pulse-width modulation; vector analysis; AC motors; Circuits; Electronic design automation and methodology; Field programmable gate arrays; Motor drives; Pulse width modulation inverters; Servomechanisms; Servomotors; Space vector pulse width modulation; Voltage; FPGA; IP core; Overmodulation; SVPWM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Software and Systems Symposia, 2008. ICESS Symposia '08. International Conference on
Conference_Location :
Sichuan
Print_ISBN :
978-0-7695-3288-2
Type :
conf
DOI :
10.1109/ICESS.Symposia.2008.67
Filename :
4627156
Link To Document :
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