DocumentCode :
285666
Title :
On Stockmeyer´s floorplan optimization technique
Author :
Wang, Ting-Chi ; Won, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Volume :
4
fYear :
1992
fDate :
3-6 May 1992
Firstpage :
1989
Abstract :
Studies the time complexity of L. Stockmeyer´s technique (1993) to solve the floorplan area optimization problem for hierarchical floorplans of order 5. The authors develop a method of constructing bad floorplans to show that Stockmeyer´s technique inherently has exponential time complexity. The special case is considered where the modules all have integer dimensions, and it is shown that this problem can be solved in pseudopolynomial time by Stockmeyer´s technique. For the general case in which the dimensions are real numbers, a pseudopolynomial-time ε-approximation algorithm is presented for solving this problem. The last two results can also be extended to hierarchical floorplans of higher order
Keywords :
circuit layout; computational complexity; network topology; ϵ-approximation algorithm; Stockmeyer´s floorplan optimization technique; hierarchical floorplans; integer dimensions; pseudopolynomial time; time complexity; Algorithm design and analysis; Approximation algorithms; Design optimization; Polynomials; Scholarships; Topology; Wheels;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0593-0
Type :
conf
DOI :
10.1109/ISCAS.1992.230387
Filename :
230387
Link To Document :
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