DocumentCode :
2856822
Title :
Test methods used to produce highly reliable known good die (KGD)
Author :
Arnold, Richard ; Menon, Sankaran M. ; Brackett, Brett ; Richmond, Ron
Author_Institution :
Texas Instrum. Inc., Midland, TX, USA
fYear :
1998
fDate :
15-17 Apr 1998
Firstpage :
374
Lastpage :
382
Abstract :
The fastest growing technology to manufacture high quality known good die (KGD) is the usage of test methods at wafer probe level. Test methods include enhanced voltage screens and IDDQ and temperature tests at the wafer level. Several years ago, when the original demands for KGD were occurring, test methods were used to produce KGD that had a 10,000 ppm quality level. This quality level was not adequate for high test reliability. As a result, the KGD industry relied upon test carriers to burn-in and test the singulated die to obtain the quality level desired by the customers. Test carrier methods are expensive and proved to be cost prohibitive for most markets. Test technologies have matured during the last few years. The understanding of voltage screens and IDDQ methods has enabled the suppliers of KGD to use test methods routinely to provide KGD that are equivalent to the packaged part. The result is that the majority of KGD manufactured at present use test methods to obtain the quality and reliability levels needed by the customers. There are common elements in the industry between the usage of test methods to provide KGD and there are also differences related to the product lines. A consensus of techniques is driving usage of test methods to produce KGD with equivalent quality to the packaged part. This paper focuses on the KGD industry efforts to use test methods for KGD production. The paper also discusses efforts within the industry to explore test methods being developed for coverage of KGD that presently need burn-in screens
Keywords :
integrated circuit reliability; integrated circuit testing; integrated circuit yield; IDDQ tests; burn-in; burn-in screens; enhanced voltage screens; highly reliable known good die; known good die manufacture; product lines; quality; quality level; reliability; singulated die; temperature tests; test carrier method costs; test carrier methods; test carriers; test methods; test reliability; wafer level tests; wafer probe level test methods; Costs; Digital signal processing; Instruments; Manufacturing; Probes; Reliability engineering; Semiconductor device packaging; Semiconductor device testing; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-4850-8
Type :
conf
DOI :
10.1109/ICMCM.1998.670811
Filename :
670811
Link To Document :
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