Design of high performance sense amplifier using independent gate control in sub-50nm double-gate MOSFET

Author

Mukhopadhyay, Saibal ; Mahmoodi, Hamid ; Roy, Kaushik

Author_Institution

Dept. of ECE, Purdue Univ., West Lafayette, IN, USA

fYear

2005

fDate

21-23 March 2005

Firstpage

490

Lastpage

495

Abstract

The double-gate (DG) transistor has emerged as the most promising device for nanoscale circuit design. Independent control of front and back gate in DG devices can be effectively used to improve performance and reduce power in sub-50 nm circuits. In this paper, we propose a high-performance sense-amplifier design using independent gate control in symmetric and asymmetric DG devices. The proposed design reduces the sensing delay of the sense amplifier by 30-35% and dynamic power by 10% (at 6 GHz) from the connected gate design.

Keywords

MOS integrated circuits; amplifiers; integrated circuit design; nanoelectronics; 6 GHz; asymmetric DG devices; double-gate transistor; high performance sense amplifier; independent gate control; nanoscale circuit design; performance; reduced power; sensing delay; sub-50 nm double-gate MOSFET; symmetric DG devices; Back; Circuit simulation; Circuit synthesis; Delay; Inorganic materials; MOSFET circuits; Medical simulation; Nanoscale devices; Power amplifiers; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on

Print_ISBN

0-7695-2301-3

Type

conf

DOI

10.1109/ISQED.2005.44

Filename

1410633