Title :
Fast decap allocation algorithm for robust on-chip power delivery
Author :
Qi, Zhenyu ; Li, Hang ; Tan, Sheldon X D ; Wu, Lifeng ; Cai, Yici ; Hong, Xianlong
Author_Institution :
Dept. of Electr. Eng., California Univ., Riverside, CA, USA
Abstract :
Adding on-chip decoupling capacitors (decaps) is an effective way to reduce voltage noise in power/ground networks and ensure robust power delivery. We present a fast decap allocation algorithm, which is able to confine voltage fluctuations below a user specified threshold by adding decaps in an area efficient way. The new algorithm adopts the recently proposed time-domain adjoint network method for sensitivity calculation. To avoid the time consuming line search at each iteration in the conjugate gradient method, we propose a simple, yet efficient, search step computation method to accelerate the optimization process. The experimental results show that the proposed algorithm is at least 10 times faster than the fastest conjugate gradient method reported so far with similar optimization results.
Keywords :
VLSI; capacitors; circuit CAD; circuit optimisation; circuit stability; integrated circuit design; integrated circuit noise; interference suppression; iterative methods; random noise; VLSI chip design; conjugate gradient method; decoupling capacitor allocation algorithm; iteration method; line search; power-ground networks; robust on-chip power delivery; search step computation method; sensitivity; time-domain adjoint network method; voltage noise reduction; Acceleration; Capacitors; Gradient methods; Network-on-a-chip; Noise reduction; Noise robustness; Optimization methods; Threshold voltage; Time domain analysis; Voltage fluctuations;
Conference_Titel :
Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on
Print_ISBN :
0-7695-2301-3
DOI :
10.1109/ISQED.2005.57