DocumentCode :
2857051
Title :
Aging analysis of circuit timing considering NBTI and HCI
Author :
Lorenz, Dominik ; Georgakos, Georg ; Schlichtmann, Ulf
Author_Institution :
Inst. for Electron. Design Autom., Tech. Univ. Munchen, Munich, Germany
fYear :
2009
fDate :
24-26 June 2009
Firstpage :
3
Lastpage :
8
Abstract :
We present an aging analysis flow able to calculate the degraded circuit timing. To the best of our knowledge it is the first approach on gate level so far capable of analyzing the impact of the two dominant drift-related aging effects - NBTI and HCI - on complex digital circuits. The aging-aware gate model used to compute the aged circuit timing provides not just the cell delay degradation, but also the degradation of the output slope. To get more accurate results, the individual workload of a gate can be considered.
Keywords :
digital circuits; logic circuits; timing circuits; HCI; NBTI; aging analysis; aging-aware gate model; cell delay degradation; circuit timing; complex digital circuits; hot carrier injection; negative bias temperature instability; output slope degradation; Aging; Circuit analysis; Degradation; Delay; Human computer interaction; Niobium compounds; Safety; Threshold voltage; Timing; Titanium compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium, 2009. IOLTS 2009. 15th IEEE International
Conference_Location :
Sesimbra, Lisbon
Print_ISBN :
978-1-4244-4596-7
Electronic_ISBN :
978-1-4244-4595-0
Type :
conf
DOI :
10.1109/IOLTS.2009.5195975
Filename :
5195975
Link To Document :
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