DocumentCode :
2857368
Title :
The Study and Implementation of the Algorithm of Identifying the PLD Pin Types through On-Board Analysis
Author :
Zhu, Yuanhua ; Li, Qingbao ; Xiao, Da
Author_Institution :
Zhengzhou Inst. of Inf. Sci. & Technol., Zhengzhou
fYear :
2008
fDate :
29-31 July 2008
Firstpage :
496
Lastpage :
501
Abstract :
The premise of achieving the reverse PLD (programmable logic device) analysis is to identify the pin types by adopting the method of on-board analysis. How to rapidly and accurately identify all pin types is the key problem. Based on theoretical analysis to inherent relationships about data changes among various types of pins, a highly efficient fixed rate algorithm is brought out to identify pin types of all kinds of PLDs. According to whether there is the clock pins, the PLDs are divided into combinational PLDs and sequential PLDs. Both the effective and the correct rate of the fixed rate algorithm are higher than the former because it adopts the correct identifying sequence and considers more details.
Keywords :
programmable logic devices; PLD pin types; onboard analysis; programmable logic device analysis; Algorithm design and analysis; Anatomy; Clocks; Data analysis; Information analysis; Logic devices; Macrocell networks; Pins; Programmable logic arrays; Programmable logic devices; Data waveform; Logic analyzer; On-board analysis; PLD; Pin type;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Software and Systems Symposia, 2008. ICESS Symposia '08. International Conference on
Conference_Location :
Sichuan
Print_ISBN :
978-0-7695-3288-2
Type :
conf
DOI :
10.1109/ICESS.Symposia.2008.83
Filename :
4627211
Link To Document :
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