Title :
Fault Demotion Using Reconfigurable Slack (FaDReS)
Author :
Imran, Nomica ; Jooheung Lee ; DeMara, Ronald F.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
Abstract :
We propose an active dynamic redundancy-based fault-handling approach exploiting the partial dynamic reconfiguration capability of static random-access memory-based field-programmable gate arrays. Fault detection is accomplished in a uniplex hardware arrangement while an autonomous fault isolation scheme is employed, which neither requires test vectors nor suspends the computational throughput. The deterministic flow of the fault-handling scheme achieves an improved recovery in a bounded number of reconfigurations. This approach extends existing signal processing properties to accommodate fault handling, and is validated by implementing an H.263 video encoder discrete cosine transform (DCT) block. The peak signal-to-noise ratio measure of the video sequences indicates fault tolerance in the DCT block with only limited quality degradation, during the isolation and recovery phases spanning a few frames.
Keywords :
discrete cosine transforms; fault tolerance; field programmable gate arrays; image sequences; random-access storage; video coding; DCT block; FaDReS; H.263 video encoder discrete cosine transform; active dynamic redundancy-based fault-handling approach; autonomous fault isolation scheme; computational throughput; deterministic flow; fault demotion; fault detection; fault tolerance; fault-handling scheme; isolation phase; partial dynamic reconfiguration capability; peak signal-to-noise ratio measure; quality degradation; reconfigurable slack; recovery phase; signal processing property; static random-access memory-based field-programmable gate array; test vector; uniplex hardware arrangement; video sequence; Circuit faults; Discrete cosine transforms; Field programmable gate arrays; Hardware; PSNR; Table lookup; Throughput; Autonomous operation; fault handling; fault tolerance; partial reconfiguration (PR); runtime faults; survivability;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2012.2206836