Title :
Designing fault tolerant FSM by nano-PLA
Author :
Baranov, S. ; Levin, I. ; Keren, O. ; Karpovsky, M.
Author_Institution :
Sch. of Eng., Bar Ilan Univ., Ramat Gan, Israel
Abstract :
The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault tolerant nano-PLAs, the area and the number of crosspoint devices, are considered as optimization criteria for the synthesis. The paper introduces a method for synthesizing fault tolerant nano-PLA based FSMs. The method is based on decomposing an initial PLA description of the FSM into a three interacting portions. The proposed solution provides significant reduction of the area without meaningful increasing of a number of crosspoint devices in comparison with known solutions and provides a trade-off between the area and the number of devices in designing FSMs by PLAs.
Keywords :
fault tolerant computing; finite state machines; optimisation; programmable logic arrays; crosspoint devices; fault tolerant FSM; finite state machines; nanoelectronic programmable logic arrays; optimization; Circuit faults; Circuit synthesis; Design engineering; Fault tolerance; Fault tolerant systems; Logic design; Logic devices; Manufacturing; Nanoscale devices; Programmable logic arrays;
Conference_Titel :
On-Line Testing Symposium, 2009. IOLTS 2009. 15th IEEE International
Conference_Location :
Sesimbra, Lisbon
Print_ISBN :
978-1-4244-4596-7
Electronic_ISBN :
978-1-4244-4595-0
DOI :
10.1109/IOLTS.2009.5196021
