DocumentCode
2857973
Title
A linear delta modulator/demodulator with 10 Mbit/S sampling rate
Author
Baldwin, G.
Author_Institution
Bell Laboratories, Holmdel, NJ, USA
Volume
XVII
fYear
1974
fDate
15-13 Feb. 1974
Firstpage
192
Lastpage
193
Abstract
A bipolar integrated linear-delta modulator that converts speech to 10-Mbit/s digital code will be described. The circuit uses a charge-parcelling integrator with 3-mV step size to achieve greater than 11-bit resolution.
Keywords
Chirp modulation; Circuits; Delta modulation; Demodulation; Frequency conversion; Latches; Power supplies; Pulse amplifiers; Sampling methods; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1974 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1974.1155348
Filename
1155348
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