• DocumentCode
    2858347
  • Title

    Hardware implementation of a high speed self-synchronizing cipher mode

  • Author

    Yuanchi Tian ; Heys, Howard M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Memorial Univ. of Newfoundland, St. John´s, NL, Canada
  • fYear
    2015
  • fDate
    3-6 May 2015
  • Firstpage
    695
  • Lastpage
    700
  • Abstract
    Pipelined statistical cipher feedback (PSCFB) mode is a new mode of operation for block cipher encryption. It is an improved version of conventional SCFB mode with higher throughput. SCFB mode has the mechanism of self synchronization to recover from bit slips during transmission in a communication channel. The mechanism of SCFB mode resembles output feedback (OFB) mode and cipher feedback (CFB) mode. However it has self synchronization that OFB mode does not and has higher efficiency than CFB mode. To improve the throughput, PSCFB is a modified version of SCFB that allows for the pipelining of the underlying block cipher while still preserving the efficiency and self-synchronizing capabilities. In this paper, the Advanced Encryption Standard (AES) with a pipeline architecture is used as the block cipher in PSCFB. The PSCFB system is designed, simulated and synthesized targeted to an Altera Cyclone IV FPGA. The structures and processes of both the encryption and decryption are presented. The system performance is analyzed based on the simulation and synthesis results.
  • Keywords
    cryptography; field programmable gate arrays; synchronisation; AES; Altera Cyclone IV FPGA; OFB mode; PSCFB mode; advanced encryption standard; bit slips; block cipher encryption; communication channel; decryption analysis; encryption analysis; hardware implementation; high-speed self-synchronizing cipher mode; output feedback mode; pipeline architecture; pipelined statistical cipher feedback mode; system performance analysis; throughput improvement; Ciphers; Clocks; Encryption; Pipeline processing; Radiation detectors; Registers; Synchronization; Advanced Encryption Standard (AES); Block Cipher; Digital Hardware; Mode of Operation; PSCFB;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Computer Engineering (CCECE), 2015 IEEE 28th Canadian Conference on
  • Conference_Location
    Halifax, NS
  • ISSN
    0840-7789
  • Print_ISBN
    978-1-4799-5827-6
  • Type

    conf

  • DOI
    10.1109/CCECE.2015.7129359
  • Filename
    7129359