DocumentCode
2858404
Title
A high-speed, AII-MOS, successive-approximation weighted capacitor A/D conversion technique
Author
McCreary, J. ; Gray, P.
Author_Institution
University of California, Berkeley, CA, USA
Volume
XVIII
fYear
1975
fDate
27426
Firstpage
38
Lastpage
39
Abstract
An N-channel all-MOS A/D converter, which utilizes charge redistribution on an array of binary-weighted capacitors to achieve a successive-approximation conversion in 20μs, will be described.
Keywords
Integrated circuit yield; Inverters; Latches; Linearity; MOS capacitors; MOSFETs; Parasitic capacitance; Switches; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
Type
conf
DOI
10.1109/ISSCC.1975.1155376
Filename
1155376
Link To Document