Title :
Two-dimensional analysis and design procedure for current-hogging logic
Author :
Wieder, Alexander ; Engl, W. ; Lehning, Herve
Author_Institution :
Institut für Theoretische Elektrotechnik, Aachen, W. Germany
Abstract :
Modeling of functional devices requires computer simulation of lateral and vertical device structure. For the basic element of CHL, this technique has resulted in a simple model enabling quantitative design of complex CHL circuits.
Keywords :
Charge carrier processes; Circuits; Current density; Epitaxial layers; Leakage current; Logic design; Logic devices; Poisson equations; Steady-state; Substrates;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
DOI :
10.1109/ISSCC.1975.1155382
