DocumentCode
2859602
Title
On synchronizing sequences and test sequence partitioning
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear
1998
fDate
26-30 Apr 1998
Firstpage
158
Lastpage
167
Abstract
We consider two topics related to the testing of synchronous sequential circuits. The first topic deals with synchronizable circuits and their synchronizing sequences. Synchronizing sequences are important in facilitating the test generation process for detectable faults, and in identifying undetectable faults. They are also important in determining whether an undetectable fault can be removed from a circuit without affecting its normal operation. We show a class of faults for which a synchronizing sequence for the faulty circuit can be easily determined from the synchronizing sequence of the fault free circuit. We also consider circuits that have a reset mechanism, and show how reset can ensure that no single fault would cause the circuit to become unsynchronizable. The second topic we consider deals with test sequence partitioning to speed up static test compaction. We propose a procedure for partitioning a given test sequence into subsequences such that the cumulative fault coverage of all the subsequences, when applied as independent test sequences, is equal to the fault coverage of the original sequence. Each subsequence can then be compacted independently
Keywords
integrated circuit testing; integrated logic circuits; logic testing; sequences; sequential circuits; synchronisation; detectable faults; fault coverage; reset mechanism; static test compaction speedup; subsequences; synchronizable circuits; synchronizing sequences; synchronous sequential circuits; test generation process; test sequence partitioning; undetectable fault identification; Circuit faults; Circuit testing; Cities and towns; Compaction; Electrical fault detection; Fault diagnosis; Logic testing; Sequential analysis; Sequential circuits; Synchronous generators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1998. Proceedings. 16th IEEE
Conference_Location
Monterey, CA
ISSN
1093-0167
Print_ISBN
0-8186-8436-4
Type
conf
DOI
10.1109/VTEST.1998.670864
Filename
670864
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