Title :
Undetectable fault removal of sequential circuits based on unreachable states
Author :
Yotsuyanagi, Hiroyuki ; Kinoshita, Kozo
Author_Institution :
Dept. of Appl. Phys., Osaka Univ., Japan
Abstract :
We present a procedure to reduce sequential circuits by removing undetectable faults based on unreachable states. Procedures for obtaining unreachable stares and for identifying undetectable faults which can be the target of fault removal are presented. Experimental results for ISCAS benchmark circuits are shown
Keywords :
circuit analysis computing; fault diagnosis; flip-flops; identification; integrated logic circuits; logic testing; redundancy; sequential circuits; sequential circuits; stuck-at fault; undetectable fault identification; undetectable fault removal; unreachable states; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Fault diagnosis; Physics; Sequential circuits; Signal processing; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 1998. Proceedings. 16th IEEE
Conference_Location :
Monterey, CA
Print_ISBN :
0-8186-8436-4
DOI :
10.1109/VTEST.1998.670866
