DocumentCode :
2859709
Title :
Design of phase shifters for BIST applications
Author :
Rajski, Janusz ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
fYear :
1998
fDate :
26-30 Apr 1998
Firstpage :
218
Lastpage :
224
Abstract :
The paper presents novel systematic design techniques for the automated synthesis of phase shifter circuits used to remove effects of structural dependencies featured by test generators driving parallel scan chains. As shown in the paper, it is possible to synthesize very large and fast phase shifters for BIST applications with guaranteed phaseshifts between scan chains and very small number of gates per channel
Keywords :
automatic testing; built-in self test; design for testability; logic testing; phase shifters; shift registers; BIST applications; gates per channel; parallel scan chains; phase shifters; systematic design techniques; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Graphics; Matrix decomposition; Network synthesis; Phase shifters; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1998. Proceedings. 16th IEEE
Conference_Location :
Monterey, CA
ISSN :
1093-0167
Print_ISBN :
0-8186-8436-4
Type :
conf
DOI :
10.1109/VTEST.1998.670871
Filename :
670871
Link To Document :
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