DocumentCode
2859895
Title
A C2MOS 16-bit parallel microprocessor
Author
Manabe, K. ; Someya, N. ; Ueno, Masahiro ; Neishi, H. ; Imai, Masayoshi ; Okamoto, Shusuke ; Suzuki, Kenji
Author_Institution
Tokyo Shibaura Electric Co., Ltd., Kawasaki, Japan
Volume
XIX
fYear
1976
fDate
18-20 Feb. 1976
Firstpage
14
Lastpage
15
Abstract
An N-channel/MOS (C2MOS) parallel microprocessor using a single chip - 5.61 mm square - will be described. A single power supply, whose voltage can vary from 3 to 12 V, with power dissipation about 1 mW at 5V, is used.
Keywords
CMOS process; Clocks; Delay; Large scale integration; Logic circuits; Microprocessors; Pulse circuits; Read only memory; Registers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1976.1155476
Filename
1155476
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